
W9725G6IB
10.3
10.4
10.5
10.6
10.7
10.8
10.9
10.10
10.11
10.12
10.13
10.14
10.15
10.16
10.17
10.18
10.19
10.20
10.21
10.22
10.23
10.24
10.25
ODT Timing for Active/Standby Mode.................................................................................................66
ODT Timing for Power Down Mode ....................................................................................................66
ODT Timing mode switch at entering power down mode ....................................................................67
ODT Timing mode switch at exiting power down mode ......................................................................68
Data output (read) timing ....................................................................................................................69
Burst read operation: RL=5 (AL=2, CL=3, BL=4) ................................................................................69
Data input (write) timing ......................................................................................................................70
Burst write operation: RL=5 (AL=2, CL=3, WL=4, BL=4)...........................................................70
Seamless burst read operation: RL = 5 ( AL = 2, and CL = 3, BL = 4) ......................................71
Seamless burst write operation: RL = 5 ( WL = 4, BL = 4).........................................................71
Burst read interrupt timing: RL =3 (CL=3, AL=0, BL=8) .............................................................72
Burst write interrupt timing: RL=3 (CL=3, AL=0, WL=2, BL=8) ..................................................72
Write operation with Data Mask: WL=3, AL=0, BL=4) ...............................................................73
Burst read operation followed by precharge: RL=4 (AL=1, CL=3, BL=4, tRTP ≦ 2clks) .............74
Burst read operation followed by precharge: RL=4 (AL=1, CL=3, BL=8, tRTP ≦ 2clks) .............74
Burst read operation followed by precharge: RL=5 (AL=2, CL=3, BL=4, tRTP ≦ 2clks) .............75
Burst read operation followed by precharge: RL=6 (AL=2, CL=4, BL=4, tRTP ≦ 2clks) .............75
Burst read operation followed by precharge: RL=4 (AL=0, CL=4, BL=8, tRTP>2clks) ..............76
Burst write operation followed by precharge: WL = (RL-1) = 3 ..................................................76
Burst write operation followed by precharge: WL = (RL-1) = 4 ..................................................77
Burst read operation with Auto-precharge: RL=4 (AL=1, CL=3, BL=8, tRTP ≦ 2clks)................77
Burst read operation with Auto-precharge: RL=4 (AL=1, CL=3, BL=4, tRTP>2clks) .................78
Burst read with Auto-precharge followed by an activation to the same bank (tRC Limit): RL=5
(AL=2, CL=3, internal tRCD=3, BL=4, tRTP ≦ 2clks) .......................................................................................78
10.26
Burst read with Auto-precharge followed by an activation to the same bank (tRP Limit): RL=5
(AL=2, CL=3, internal tRCD=3, BL=4, tRTP ≦ 2clks) .......................................................................................79
11.
10.27
10.28
10.29
10.30
10.31
10.32
Burst write with Auto-precharge (tRC Limit): WL=2, WR=2, BL=4, tRP=3.................................79
Burst write with Auto-precharge (WR + tRP Limit): WL=4, WR=2, BL=4, tRP=3 .......................80
Self Refresh Timing ...................................................................................................................80
Active Power Down Mode Entry and Exit Timing.......................................................................81
Precharged Power Down Mode Entry and Exit Timing ..............................................................81
Clock frequency change in precharge Power Down mode ........................................................82
PACKAGE SPECIFICATION ..............................................................................................................83
Package Outline WBGA-84 (8x12.5 mm 2 ).......................................................................................................83
12.
REVISION HISTORY ..........................................................................................................................84
Publication Release Date: Oct. 23, 2009
-3-
Revision A04